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Board Description
4.2.8
TV-Out Extension
The Chrontel ? CH7024 chip provides an interface between the SAM9M10 LCD Controller and a TV set
by converting LCD signals to TV signals.
The CH7024 is a TV encoder device which encodes the video signals and generates synchronization
signals for NTSC and PAL standards. Supported TV output formats are NTSC-M, NTSC-J, NTSC-433,
PAL-B/D/G/A/I, PAL-M, PAL-N and PAL-60. The CH7024 provides video output support for CVBS or S-
video.
Figure 4-13. TV-Out Extension Port
PE[0.. 3 0]
PE 3 0
PE29
PE2 8
(B7)
(B6)
(B5)
PE27
PE26
PE25
PE24
(B4)
(B 3 )
(B2)
(B1)
1
L17
2200R
2
3 V 3
3 V 3
PA20
PA21
NR S T
PE2 3 (B0)
PE22 (G7)
PE21 (G6)
PE20 (G5)
PE19 (G4)
PE1 8 (G 3 )
PE17 (G2)
PE16 (G1)
PE15 (G0)
PE14 (R7)
PE1 3 (R6)
PE12 (R5)
PE11 (R4)
PE10 (R 3 )
PE9 (R2)
PE 8 (R1)
PE7 (R0)
PE6 (LCDDEN)
PE5 (LCDDOTCK)
PE4 (H S YNC)
PE 3 (V S YNC)
PE2 (LCDCC)
PE1 (LCDMOD)
PE0 (LCDPWR)
TV_V S YNC
TV_H S YNC
TV_XCLK
R179 4.7k
R1 8 0 4.7k
(TWDO)
(TWCK0)
PE2 3
PE24
PE25
PE26
PE27
PE2 8
PE29
PE 3 0
PE15
PE16
PE17
PE1 8
PE19
PE20
PE21
PE22
PE7
PE 8
PE9
PE10
PE11
PE12
PE1 3
PE14
PE6
42
4 3
44
45
46
47
4 8
1
2
3
4
5
6
7
8
9
10
11
12
1 3
14
15
17
19
3 9
40
41
20
21
22
2 3
MN20
D0
D1
D2
D 3
D4
D5
D6
D7
D 8
D9
D10
D11
D12
D1 3
D14
D15
D16
D17
D1 8
D19
D20
D21
D22
D2 3
V
H
XCLK
DE
S PD
S PC
RE S ET
CH7024B
VDDIO
DVDD
DGND
AVDD_PLL
AGND_PLL
AVDD
AGND
AVDD_DAC
AGND_DAC
I S ET
CVB S
Y
C/CVB S
38
16
1 8
3 2
3 1
33
3 6
25
29
3 0
2 8
27
26
C196 C197
100n 100n
C200
100n
C202
100n
C20 3
100n
R17 8 1.2k
1 %
R1 8 1 75R
R1 8 2
75R
R1 83 75R
L1 8
2200R
1 2
C19 8
10 u
10V
L19
2200R
1 2
L20
2200R
1 2
L21
2200R
1 2
C204 33 p
L22
1. 8u H
C205
100p
1V 8
C199
10 u
10V
3 V 3
C201
10 u
10V
C206 D 8
100p 1
BAT54 S LT1G
3 V 3
2
3
Compo s ite
Video
O u tp u t
RCA JACK
J20
3 V 3
24
NC
P-OUT
3 7
R1 8 4
10k DNP
1
Y6
1 3 MHz
VDD 4
DNP
R1 8 5
0R
TP6
2 VSS OUT 3
DNP
R1 8 6
0R
1
Y7
3
C207
100n
DNP
C20 8
1 3 MHz
C209
AT91SAM9M10-G45-EK User Guide
10p
10p
4-17
6495B–ATARM–21-Apr-10
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